View MAX902ESD-T_4308823.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

not recommended for new designs the max900 was manufactured for maxim by an outside wafer foundry using a process that is no longer available. it is not recommended for new designs. a maxim replacement or an industry second-source may be available. the data sheet remains available for existing users. the other parts on the follo wing data sheet are not affected. for further information, please see the quickview data sheet for this part or contact technical support for assistance.
general description the max900?ax903 high-speed, low-power, single/ dual/quad voltage comparators feature differential ana- log inputs and ttl-logic outputs with active internal pull- ups. fast propagation delay (8ns typ at 5mv overdrive) makes the max900?ax903 ideal for fast a/d convert- ers and sampling circuits, line receivers, v/f converters, and many other data-discrimination applications. all comparators can be powered from separate analog and digital power supplies or from a single combined sup- ply voltage. the analog input common-mode range includes the negative rail, allowing ground sensing when powered from a single supply. the max900?ax903 consume 18mw per comparator when powered from +5v. the max900?ax903 are equipped with independent ttl-compatible latch inputs. the comparator output states are held when the latch inputs are driven low. the max901 provides the same performance as the max900/max902/max903 with the exception of the latches. for newer, pin-for-pin compatible parts with the same speed and only half the power dissipation, see the max9201/max9202/max9203 data sheet. applications features ? 8ns (typ) propagation delay ? 18mw/comparator power consumption (+5v, typ) ? separate analog and digital supplies ? flexible analog supply: +5v to +10v or ?v ? input range includes negative supply rail ? ttl-compatible outputs ? ttl-compatible latch inputs (except max901) max900?ax903 high-speed, low-power voltage comparators ________________________________________________________________ maxim integrated products 1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in- (a) in- (d) in+ (d) v cc ** out (d) out (c) v dd ** in+ (c) in- (c) top view max901 dip/so in+ (a) gnd v ee * out (a) out (b) in+ (b) in- (b) ad bc 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc ** n.c. out (b) latch (b) latch (a) gnd in+ (a) in- (a) max902 v dd *** in+ (b) in- (b) v ee * n.c. out (a) dip/so gnd latch v ee * 1 2 8 7 v dd *** out in+ in- v cc ** dip/so 3 4 6 5 max903 a b *analog v- and substrate **analog v+ ***digital v+ part temp range pin-package max900 acpp 0? to +70? 20 plastic dip max900bcpp 0? to +70? 20 plastic dip max900acwp 0? to +70? 20 wide so max900bcwp 0? to +70? 20 wide so max900aepp -40? to +85? 20 plastic dip max900bepp -40? to +85? 20 plastic dip max900aewp -40? to +85? 20 wide so max900bewp -40? to +85? 20 wide so max901 acpe 0? to +70? 16 plastic dip max901bcpe 0? to +70? 16 plastic dip pin configurations ordering information 19-2887; rev. 5; 2/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information continued at end of data sheet. pin configurations continued at end of data sheet. high-speed a/d converters high-speed v/f converters line receivers threshold detectors input trigger circuitry high-speed data sampling pwm circuits
max900?ax903 high-speed, low-power voltage comparators 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +5v, v ee = -5v, v dd = +5v, le1?e4 = logic high, t a = +25? , unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. analog supply voltage (v cc to v ee ) ...................................+12v digital supply voltage (v dd to gnd) ....................................+7v differential input voltage..................(v ee - 0.2v) to (v cc + 0.2v) common-mode input voltage..........(v ee - 0.2v) to (v cc + 0.2v) latch-input voltage (max900/max902/ max903 only) .........................................-0.2v to (v dd + 0.2v) output short-circuit duration to gnd.......................................................................indefinite to v dd ...............................................................................1min internal power dissipation................................................500mw derate above +100? ................................................10mw/? operating temperature ranges: max900?ax903_c_ _ .......................................0? to +70? max900?ax903_e_ _ ....................................-40? to +85? junction temperature........................................-65? to +160? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? max900a/max901a max900b/max901b/ max902/max903 parameter symbol conditions min typ max min typ max units input offset voltage v os v cm = 0 v o = 1.4v 0.5 2.0 1.0 4.0 mv input bias current i b i in + or i in - 3 6 4 10 ? input offset current i os v cm = 0; v o = 1.4v 50 250 100 500 na input voltage range v cm (note 1) v ee - 0.1 v cc - 2.25 v ee - 0.1 v cc - 2.25 v common-mode rejection ratio cmrr -5v < v cm < +2.75v, v o = 1.4v (note 2) 50 150 75 250 ?/v power-supply rejection ratio psrr (note 2) 50 150 100 250 ?/v output high voltage v oh v in > 250mv, i src = 1ma 2.4 3.5 2.4 3.5 v output low voltage v ol v in > 250mv, i sink = 8ma 0.3 0.4 0.3 0.4 v latch-input voltage high v lh (note 3) 1.4 2.0 1.4 2.0 v latch-input voltage low v ll (note 3) 0.8 1.4 0.8 1.4 v latch-input current high i lh v lh = 3.0v (note 3) 1 20 1 20 ? latch-input current low i ll v ll = 0.3v (note 3) 1 20 1 20 ?
max900?ax903 high-speed, low-power voltage comparators _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +5v, v ee = -5v, v dd = +5v, le1?e4 = logic high, t a = +25? , unless otherwise noted.) m ax900a/m ax901a m ax900b/m ax901b max902 max903 parameter symbol conditions min typ max min typ max min typ max units positive analog supply current i cc (note 7) 10 15 5 8 2.5 4 ma negative analog supply current i ee (note 7) 7 12 3.5 6 2 3 ma digital supply current i dd (note 7) 4 6 2 3 1 1.5 ma power dissipation pd v cc = v dd = +5v, v ee = 0 70 105 35 55 18 28 mw timing characteristics (v cc = +5v, v ee = -5v, v dd = +5v, le1?e4 = logic high, t a = +25? , unless otherwise noted.) max900a/max901a max900b/max901b max902 max903 parameter symbol conditions min typ max min typ max min typ max units input-to-output high response time t pd+ v od = 5mv, c l = 15pf, i o = 2ma (note 4) 8 10 8 10 8 10 ns input-to-output low response time t pd - v od = 5mv, c l = 15pf, i o = 2ma (note 4) 8 10 8 10 8 10 ns difference in response time between outputs ? t pd (notes 4, 5) 0.5 2.0 0.5 2.0 0.5 2.0 ns latch disable to output high delay t pd+ (d) (notes 3, 6) 10 10 10 ns latch disable to output low delay t pd- (d) (notes 3, 6) 12 12 12 ns minimum setup time t s (notes 3, 6) 2 2 2 ns minimum hold time t h (notes 3, 6) 1 1 1 ns minimum latch disable pulse width t pw (d) (notes 3, 6) 10 10 10 ns
max900?ax903 high-speed, low-power voltage comparators 4 _______________________________________________________________________________________ electrical characteristics (v cc = +5v, v ee = -5v, v dd = +5v, le1?e4 = logic high, t a = full operating temperature , unless otherwise noted.) max900a/max901a max900b/max901b/ max902/max903 parameter symbol conditions min typ max min typ max units input offset voltage v os v cm = 0, v o = 1.4v 13 2 6 mv input bias current i b i in+ or i in- 4 10 6 15 ? input offset current i os v cm = 0, v o = 1.4v 100 500 200 800 na input voltage range v cm (note 1) v ee - 0.1 v cc - 2.25 v ee - 0.1 v cc - 2.25 v common-mode rejection ratio cmrr -5v < v cm < +2.75v, v o = 1.4v (note 2) 80 250 120 500 ?/v power-supply rejection ratio psrr (note 2) 100 250 150 500 ?/v output high voltage v oh v in > 250mv, i src = 1ma 2.4 3.5 2.4 3.5 v output low voltage v ol v in > 250mv, i sink = 8ma 0.3 0.4 0.3 0.4 v latch input voltage high v lh (note 7) 1.4 2.0 1.4 2.0 v latch input voltage low v ll (note 7) 0.8 1.4 0.8 1.4 v latch input current high i lh v lh = 3.0v (note 7) 2 20 1 20 ? latch input current low i ll v ll = 0.3v (note 7) 2 20 1 20 ?
max900?ax903 high-speed, low-power voltage comparators _______________________________________________________________________________________ 5 electrical characteristics (continued) (v cc = +5v, v ee = -5v, v dd = +5v, le1?e4 = logic high, t a = full operating temperature , unless otherwise noted.) max900a/max901a/ max900b/max901b max902 max903 parameter symbol conditions min typ max min typ max min typ max units positive analog supply current i cc (note 7) 10 25 5 12 2.5 6 ma negative analog supply current i ee (note 7) 7 20 3.5 10 2 5 ma digital supply current i dd (note 7) 4 10 2 5 1 2.5 ma power dissipation p d v cc = v dd = +5v, v ee = 0 70 105 35 55 18 28 mw timing characteristics (v cc = +5v, v ee = -5v, v dd = +5v, le1?e4 = logic high, t a = full operating temperature , unless otherwise noted.) max900a/max901a max900b/max901b/ max902/max903 parameter symbol conditions min typ max min typ max units input-to-output high response time t pd+ v od = 5mv, c l = 15pf, i o = 2ma (note 4) 10 15 10 15 ns input-to-output low response time t pd- v od = 5mv, c l = 15pf, i o = 2ma (note 4) 10 15 10 15 ns difference in response time between outputs ? t pd (notes 4, 5) 1 3 1 3 ns note 1: the input common-mode voltage and input signal voltages should not be allowed to go negative by more than 0.2v below v ee . the upper-end of the common-mode voltage range is typically v cc - 2v, but either or both inputs can go to a maximum of v cc + 0.2v without damage. note 2: tested for +4.75v < v cc < +5.25v, and -5.25v < v ee < -4.75v with v dd = +5v, although permissible analog power-supply range is +4.75v < v cc < +10.5v for single-supply operation with v ee grounded. note 3: specification does not apply to max901. note 4: guaranteed by design. times are for 100mv step inputs (see propagation delay characteristics in figures 2 and 3). note 5: maximum difference in propagation delay between any of the four comparators in the max900?ax903. note 6: see timing diagram (figure 2). owing to the difficult and critical nature of switching measurements involving the latch, these parameters cannot be tested in a production environment. typical specifications listed are taken from measurements using a high-speed test-jig. note 7: i cc tested for +4.75v < v cc < +10.5v with v ee grounded. i ee tested for -5.25v < v ee < -4.75v with v cc = +5v. i dd tested for +4.75v < v dd < +5.25v with the worst-case condition of all four comparator outputs at logic low.
max900?ax903 high-speed, low-power voltage comparators typical operating characteristics (t a = +25?, unless otherwise noted.) 0 -1 -2 1 2 20 0 -40 -20 40 60 80 100 120 input offset voltage vs. temperature max900-03 toc01 temperature ( c) input offset voltage (mv) 3.0 2.5 2.0 3.5 4.0 20 0 -40 -20 40 60 80 100 120 input bias current vs. temperature max900-03 toc02 temperature ( c) input bias voltage ( v) 0.2 0.1 0.4 0.3 0.5 output low voltage (v ol ) vs. load current max900-03 toc03 load current (ma) output low voltage (v) 46 2810 t a = -55 c t a = +125 c t a = +25 c 1.8 1.6 2.4 2.2 2.0 3.0 2.8 2.6 67 45 8910 i cc supply current (per comparator) vs. v cc supply voltage max900-03 toc04 v cc supply voltage (v) i cc supply current (ma) t a = +125 c t a = +25 c t a = -55 c v dd = +5v 0 -100 1 0 100 3 4 2 46 0 2 8 101214 iinput overdrive vs. t pd+ response time max900-03 toc05 tpd+ response time (ns) input voltage output voltage input overdrive (v od ) 25mv 2mv 5mv 0 -100 1 0 100 3 4 2 46 0 2 8 101214 input overdrive vs. t pd- response time max900-03 toc06 tpd- response time (ns) input voltage output voltage input overdrive (v od ) 25mv 2mv 5mv 5 7 6 9 8 10 11 13 12 14 -40 -20 0 20 40 60 80 100 120 response time vs. temperature (5mv overdrive) max900-03 toc07 temperature ( c) response time (ns) t pd+ t pd- 8 7 10 9 11 12 14 13 10 20 30 40 50 60 70 80 response time vs. load capacitance (5mv overdrive) max900-03 toc08 load capacitance (pf) t pd- t pd+ r l = 2.4k ? 6 ______________________________________________________________________________________
max900?ax903 high-speed, low-power voltage comparators _______________________________________________________________________________________ 7 pin name function 1, 10, 11, 20 in- (a, b, c, d) negative input (channels a, b, c, d) 2, 9, 12, 19 in+ (a, b, c, d) positive input (channels a, b, c, d) 3 gnd ground terminal 4, 7, 14, 17 latch (a, b, c, d) latch input (channels a, b, c, d) 5, 6, 15, 16 out (a, b, c, d) output (channels a, b, c, d) 8v ee negative analog supply and substrate 13 v dd positive digital supply 18 v cc positive analog supply pin name function 1, 8 in- (a, b) negative input (channels a, b) 2, 9 in+ (a, b) positive input (channels a, b) 3 gnd ground terminal 4, 11 latch (a, b) latch input (channels a, b) 5, 12 out (a, b) output (channels a, b) 6, 13 n.c. no connection. not internally connected. 7v ee negative analog supply and substrate 10 v dd positive digital supply 14 v cc positive analog supply pin name function 1v cc positive analog supply 2 in+ positive input 3 in- negative input 4v ee negative analog supply and substrate 5 latch latch input 6 gnd ground terminal 7 out output 8v dd positive digital supply pin name function 1, 8, 9, 16 in- (a, b, c, d) negative input (channels a, b, c, d) 2, 7, 10, 15 in+ (a, b, c, d) positive input (channels a, b, c, d) 3 gnd ground terminal 4, 5, 12, 13 out (a, b, c, d) output (channels a, b, c, d) 6v ee negative analog supply and substrate 11 v dd positive digital supply 14 v cc positive analog supply pin descriptions max900 max901 max902 max903
max900?ax903 high-speed, low-power voltage comparators 8 _______________________________________________________________________________________ applications information circuit layout because of the large gain-bandwidth transfer function of the max900?ax903, special precautions must be taken to realize their full high-speed capability. a printed circuit board with a good, low-inductance ground plane is mandatory. all decoupling capacitors (the small 100nf ceramic type is a good choice) should be mount- ed as close as possible to the power-supply pins. separate decoupling capacitors for analog v cc and for digital v dd are also recommended. close attention should be paid to the bandwidth of the decoupling and terminating components. short lead lengths on the inputs and outputs are essential to avoid unwanted par- asitic feedback around the comparators. solder the device directly to the printed circuit board instead of using a socket. input slew-rate requirements as with all high-speed comparators, the high gain-band- width product of the max900?ax903 can create oscil- lation problems when the input traverses the linear region. for clean output switching without oscillation or steps in the output waveform, the input must meet mini- mum slew-rate requirements. oscillation is largely a function of board layout and of coupled source imped- ance and stray input capacitance. both poor layout and large-source impedance will cause the part to oscillate and increase the minimum slew-rate requirement. in some applications, it may be helpful to apply some posi- tive feedback between the output and + input. this pushes the output through the transition region cleanly, but applies a hysteresis in threshold seen at the input terminals. ttl output and latch inputs the comparator ttl-output stages are optimized for dri- ving low-power schottky ttl with a fan-out of four. when the latch is connected to a logic high level, the comparator is transparent and immediately responds to changes at the input terminals. when the latch is con- nected to a ttl low level, the comparator output latches in the same state as at the instant that the latch command is applied, and will not respond to subsequent changes at the input. no latch is provided on the max901. power supplies the max900?ax903 can be powered from separate analog and digital supplies or from a single +5v supply. the analog supply can range from +5v to +10v with v ee grounded for single-supply operation (figures 1a and 1b) or from a split ?v supply (figure 1c). the v dd digital supply always requires +5v. in high-speed, mixed-signal applications where a com- mon ground is shared, a noisy digital environment can adversely affect the analog input signal. when set up with separate supplies (figure 1c), the max900?ax903 isolate analog and digital signals by providing a separate agnd (v ee ) and dgnd. +10v +5v v cc v ee v dd out gnd +5v v cc v ee v dd out gnd +5v -5v +5v v cc v ee v dd out gnd figure 1a. separate analog supply, common ground figure 1b. single +5v supply, common ground figure 1c. split ?v supply, separate ground typical power-supply alternatives
max900?ax903 high-speed, low-power voltage comparators _______________________________________________________________________________________ 9 definitions of terms v os input offset voltage: voltage applied between the two input terminals to obtain ttl-logic threshold (+1.4v) at the output. t pd+ (d) latch disable-to-output high delay: the propagation delay measured from the latch-signal crossing the ttl threshold in a low-to-high transition to the point of the output crossing ttl threshold in a low-to-high transition. v in input voltage pulse amplitude: usually set to 100mv for comparator specifications. t pd- (d) latch disable-to-output low delay: the propagation delay measured from the latch-signal crossing the ttl threshold in a low-to-high transition to the point of the output crossing ttl threshold in a high-to-low transition. v od input voltage overdrive: usually set to 5mv and in opposite polarity to v in for comparator specifications. t s minimum setup time: the minimum time before the negative transition of the latch signal that an input signal change must be present in order to be acquired and held at the outputs. t pd+ input-to-output high delay: the propagation delay measured from the time the input signal crosses the input offset voltage to the ttl-logic threshold of an output low-to-high transition t h minimum hold time: the minimum time after the negative transition of the latch signal that an input signal must remain unchanged in order to be acquired and held at the output. t pd- input-to-output low delay: the propagation delay measured from the time the input signal crosses the input offset voltage to the ttl-logic threshold of an output high-to-low transition. t pw (d) minimum latch-disable pulse width: the minimum time that the latch signal must remain high in order to acquire and hold an input-signal change.
max900?ax903 high-speed, low-power voltage comparators 10 ______________________________________________________________________________________ latch enable input latch latch latch compare compare differental input voltage comparator output v in 1.4v 1.4v v os t pd+ (d) tpw(d) t pd- v dd t s t h figure 2. max900/max902/max903 timing diagram output input 5ns/div +5v 0 v os +5mv 100mv figure 4. t pd- response time to 5mv overdrive precision step generator output to 10x scope probe (10m ? , 14pf) input to 10x scope probe (10m ? , 14pf) 100nf 100nf r l 2.43k ? v dd +5v v cc +5v v ee -5v d.u.t. 10 ? 10 ? 100nf 100nf v dc offset adjust 10k ? 1k ? figure 5. response-time setup output input 5ns/div +5v 0 v os +5mv 100mv figure 3. t pd+ response time to 5mv overdrive
max900?ax903 high-speed, low-power voltage comparators ______________________________________________________________________________________ 11 output 1v/div input 10mv/div 5ns/div figure 6. response to 50mhz sine wave mx7228 in1 under limit in2 in3 in4 in5 in6 in8 in7 over limit under limit under limit under limit under limit over limit over limit vdac8 vdac1 octal 8-bit dac 8 x 8 data latch control logic a0 a1 a2 msb d7 8-bit data input lsb d1 vref +1.25v v out8 max901 v out1 max901 figure 8. alarm circuit level monitors eight separate inputs output 1v/div input 10mv/div 5ns/div figure 7. response to 100mhz sine wave photo typical application programmed, variable-alarm limits by combining two quad analog comparators with an octal 8-bit d/a converter (the mx7228), several alarm and limit-defect functions can be performed simultane- ously without external adjustments the mx7228? internal latches allow the system processor to set the limit points for each comparator independently and update them at any time. set the upper and lower thresholds for a single transducer by pairing the d/a converter and comparator sections.
max900?ax903 high-speed, low-power voltage comparators maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. ordering information (continued) pin configurations (continued) part temp range pin-package max901acse 0? to +70? 16 narrow so max901bcse 0? to +70? 16 narrow so max901aepe -40? to +85? 16 plastic dip max901bepe -40? to +85? 16 plastic dip max901aese -40? to +85? 16 narrow so max901bese -40? to +85? 16 narrow so max902 cpd 0? to +70? 14 plastic dip max902csd 0? to +70? 14 narrow so max902epd -40? to +85? 14 plastic dip max902esd -40? to +85? 14 narrow so max903 cpa 0? to +70? 8 plastic dip max903csa 0? to +70? 8 so max903epa -40? to +85? 8 plastic dip max903esa -40? to +85? 8 so 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 in- (d) in+ (d) v cc ** latch (d) latch (a) gnd in+ (a) in- (a) top view out (d) out (c) latch (c) v dd *** v ee * latch (b) out (b) out (a) 12 11 9 10 in+ (c) in- (c) in- (b) in+ (b) max900 dip/so ad bc *analog v- and substrate **analog v+ ***digital v+

▲Up To Search▲

Price & Availability of MAX902ESD-T

	To Download MAX902ESD-T Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .